Adaptive Multi-Objective Timing Optimization for Multi-Mode Multi-Corner Signoff

Abstract

In the backend design flow of ultra-large-scale integrated circuits (ULSI), static timing analysis (STA) has become the most widely adopted method for timing signoff. However, multi-mode multi-corner (MMMC) timing analysis significantly increases the complexity of STA, making timing convergence during signoff more challenging. Based on a UMC 28 nm process technology and a ULSI backend design project, this work proposes an automated and accurate approach to resolve timing violations during signoff. The XTop tool is employed in a cross-platform environment to optimize timing violations, replacing the traditional method that requires manual scripting to back-annotate violating paths to the place-and-route (PR) stage for iterative fixes. Experimental results demonstrate that XTop can automatically and precisely repair a large number of hold-time violations without degrading setup timing performance.